Micron unveils ambitious DRAM and NAND roadmap with 3D DRAM and custom silicon
Micron outlines its memory roadmap through 2030, featuring 3D NAND, High-NA EUV, new materials, and custom silicon solutions for AI.

Micron Technology has disclosed its comprehensive memory roadmap for the coming years, detailing plans for advanced DRAM and NAND production, wafer bonding, High-NA EUV lithography, and the return of custom silicon. As AI developers face severe performance bottlenecks with traditional hardware, Micron aims to redefine memory architectures to meet future computing demands.
- Micron details multi-year memory roadmap covering advanced DRAM nodes and 3D NAND technologies.
- The company abandons 4F2 DRAM cells in favor of 6F2 architectures and future 3D DRAM designs.
- Custom memory solutions like cHBM4E, vHBM, and vEIM make a comeback to support advanced AI workloads.
- Mass production of the next-generation 1delta process is scheduled for the second half of 2027.
DRAM roadmap evolution: From 1delta to angstrom nodes
Micron's leadership noted that planar DRAM is rapidly approaching atomic limits. Unlike competitors Samsung, SK hynix, and CXMT, Micron decided to abandon 4F2 memory cell development due to a lack of viable scaling paths. Instead, the company's roadmap relies on the current 1-gamma node followed by the 1-delta process, which is scheduled for mass production in the second half of 2027 at its U.S. facilities.
The 1-delta node is expected to increase bit density by roughly 20-25% over its predecessor, leveraging advanced high-k metal gate CMOS, new materials, and angstrom-level process control. Subsequent nodes include the 1-epsilon process utilizing wafer bonding, followed by the zeta-angstrom and eta-angstrom nodes which will incorporate High-NA EUV lithography closer to the end of the decade.
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In parallel with planar memory, Micron is actively developing two generations of 3D DRAM, designated as 3D1 and 3D2. Unlike conventional planar memory that scales horizontally, 3D DRAM utilizes the vertical dimension to pack more memory cells into a given footprint. Micron plans to introduce this technology commercially once it achieves cost and performance parity with traditional solutions.
For 3D NAND, Micron is intensely focused on leveraging new materials to densify cell architecture and continue XYZ scaling. These manufacturing improvements will enable higher capacities and better performance for enterprise storage systems and hyperscale data centers handling massive AI datasets.
The return of custom silicon for artificial intelligence workloads
One of the most revealing aspects of Micron's strategy is the re-emergence of custom DRAM and NAND products tailored for AI developers. Standard and custom HBM4E, vertical HBM (vHBM), and vertical Edge Inference Memory (vEIM) will allow customers to optimize memory architectures for unique processor designs and specific workloads.
By co-designing base dies with custom logic offloaded from GPUs or ASICs, Micron enables better thermal performance, reduced latency, and optimized power consumption. This shift toward customized memory solutions addresses the growing limitations of off-the-shelf hardware in large-scale artificial intelligence deployments.
Industry implications and future outlook
Micron's long-term technology roadmap highlights a significant shift in the semiconductor industry toward application-specific memory architectures. As artificial intelligence models grow exponentially, the integration of custom silicon and advanced packaging technologies like wafer bonding will play a vital role in overcoming memory bottlenecks and driving the next wave of computing efficiency.
Source: Latest from Tom's Hardware



